Latest memory system Weblinks:
- Method, system, and apparatus for memory controller utilization of an amb write fifo to improve fbd memory channel efficiency
A memory controller to support fully buffered DIMMS by utilizing a write FIFO to switch from the default condition of a memory controller scheduling read requests out-of-order to scheduling write transactions from a write FIFO buffer for a predetermined set of conditions is discussed. For example, the predetermined set of...- RAM Booster Expert 1.30 - Optimize and free up RAM memory on your system
Many software products, including Windows, load a huge amount of libraries in memory, but not all of them are necessary. Our memory optimizer product will find these memory blocks and will unload them to the page file. When some of this data becomes necessary it is loaded back to RAM memory again. Sometimes when applications close, not the entire allocated memory is released. RAM Booster Expert finds these memory leaks and flushes them, increasing size of free memory. Also RAM Booster Expert make a memory de-fragmentation that reduce the needed time for CPU to find the information.- Method and system for correcting errors in read-only memory devices, and computer program product therefor
A system for correcting errors in read-only memory devices by means of memory patches, wherein patch data is used as read data in the place of erroneous data stored at a given location in the memory. The system includes a processing core, such as an ARM processor, adapted to perform...- How Much System Memory Is Really Enough?
When it comes to adding memory, we all have to deal with the cost vs. speed equation. So how much memory do you really need? Our tester got some surprising results.- Method, system, and apparatus high speed interconnect to improve data rates of memory subsystems
A technique is discussed for a different memory sub system topology to allow for separating impedance discontinuity The trace lengths from the MCH and the trace lengths to each memory device is calculated based at least in part on a frequency domain and time domain analysis. The new topology improves...- System and method for testing a memory
A method and apparatus for testing a memory at speed. A test and repair wrapper integrated with a memory instance is operable to receive test information scanned in from a built-in self-test and repair (BISTR) processor. Logic circuitry associated with the test and repair wrapper is operable to generate address,...
FREE NEWSLETTER
|
| Latest News, and Special Offers on Memory enter your name and email address here: |
|
|
|
|